ثبت نام ورکشاپ رایگان و مجازی در رابطه با هسته های نرم :
Dear RISC-V FPGA soft processor / SoC friends,
Please join us on Nov 7 and 8, between 8am-12pm PDT, to attend the First Annual Soft RISC-V Systems Workshop (SRvS). The workshop is completely online and FREE to attend by Zoom, but you must register in advance.
We have arranged for keynote presentations from all 6 major soft RISC-V platforms: Achronix+Bluespec, AMD MicroBlazeV, Efinix+VexRiscV, Intel NIOS V, Lattice Semiconductor's RX, and Microsemi's Mi-V.
Now that the open instruction set architecture of RISC-V has been adopted by all major FPGA vendors, users and vendors might begin to align their goals for CPUs, SoC systems design, and software tooling. Soft CPUs and soft SoC systems offer the most flexibility for customization, but they can also provide so much diversity that tooling becomes more difficult. Establishing common tooling, standards, interfaces, and policies helps to provide consistency needed by users for designing and supporting their soft RISC-V systems.
The workshop will be a technically focused, inclusive celebration of the world of RISC-V FPGA Soft Processor Systems, and the great diversity of designs, designers, and applications. Whether you use FPGA RISC-V systems in industry, research, education, or as a hobby, whether closed or open source, whether CPU cores, SoCs, gadgets,
software, or application, whether this is your tenth system or your first, we want to hear your story. Presentations may be traditional, or they may include a live or prerecorded demo.
WEBSITE:
https://sites.google.com/view/srvs-workshop
FREE REGISTRATION:
https://community.riscv.org/e/m94ufu